linux-drivers/
drivers/usb/dwc2

Synopsys DesignWare USB 2.0 HS OTG (DWC2) controller

Driver for the Synopsys DesignWare USB 2.0 high-speed On-The-Go controller, a licensable IP block that vendors integrate into SoCs to provide USB 2.0 host, device, or dual-role ports. It powers USB on a wide range of embedded platforms including Raspberry Pi boards, Rockchip, Amlogic, STMicroelectronics, and Loongson chips.

keep conf=0.93 deploy=medium replacement=none subsystem=usb category=bus-usb
93%

recommendation

It should stay because the DWC2 controller is a widely-licensed Synopsys USB 2.0 high-speed OTG block embedded in many current SoCs, and the kernel code is actively maintained — over a hundred substantive commits in the last five years from dozens of contributors, plus 2024 stable backports for gadget LPM and host hibernation issues. Synopsys still sells this IP family, so new hardware keeps appearing.

repository signals

18 files
25,880 source lines
127 commits, 5y
+1,561 / −1,057 lines added / removed, 5y
51 authors, 5y
monthly commits · 2021-04-21 → 2026-04-21 · 127 total · active in 47/61 months
2021 2022 2023 2024 2025 2026 2021-04: 16 commits · +254 −113 2021-05: 8 commits · +16 −17 2021-06: 1 commit · +21 −9 2021-07: 4 commits · +67 −8 2021-08: 3 commits · +28 −1 2021-09: 2 commits · +107 −86 2021-10: 5 commits · +81 −54 2021-11: 3 commits · +17 −6 2021-12: 6 commits · +79 −46 2022-01: 3 commits · +26 −4 2022-02: 1 commit · +6 −2 2022-03: 0 commits · +0 −0 2022-04: 1 commit · +63 −1 2022-05: 2 commits · +1 −2 2022-06: 3 commits · +6 −2 2022-07: 0 commits · +0 −0 2022-08: 1 commit · +4 −4 2022-09: 1 commit · +1 −360 2022-10: 1 commit · +1 −1 2022-11: 0 commits · +0 −0 2022-12: 2 commits · +10 −3 2023-01: 0 commits · +0 −0 2023-02: 1 commit · +2 −1 2023-03: 4 commits · +7 −23 2023-04: 2 commits · +38 −3 2023-05: 3 commits · +36 −7 2023-06: 0 commits · +0 −0 2023-07: 1 commit · +1 −2 2023-08: 2 commits · +43 −15 2023-09: 1 commit · +1 −1 2023-10: 1 commit · +6 −15 2023-11: 1 commit · +7 −8 2023-12: 1 commit · +1 −0 2024-01: 0 commits · +0 −0 2024-02: 0 commits · +0 −0 2024-03: 14 commits · +301 −89 2024-04: 1 commit · +3 −1 2024-05: 1 commit · +2 −2 2024-06: 0 commits · +0 −0 2024-07: 4 commits · +28 −5 2024-08: 1 commit · +14 −12 2024-09: 3 commits · +11 −2 2024-10: 1 commit · +0 −1 2024-11: 0 commits · +0 −0 2024-12: 3 commits · +8 −11 2025-01: 1 commit · +1 −0 2025-02: 4 commits · +174 −110 2025-03: 0 commits · +0 −0 2025-04: 2 commits · +9 −3 2025-05: 2 commits · +3 −3 2025-06: 2 commits · +4 −1 2025-07: 1 commit · +26 −12 2025-08: 0 commits · +0 −0 2025-09: 1 commit · +26 −0 2025-10: 0 commits · +0 −0 2025-11: 2 commits · +12 −5 2025-12: 0 commits · +0 −0 2026-01: 1 commit · +1 −0 2026-02: 2 commits · +6 −6 2026-03: 1 commit · +2 −0 2026-04: 0 commits · +0 −0

sources

  1. cateee.net

    LKDDb shows CONFIG_USB_DWC2 is still present through 6.19 and 7.0-rc+HEAD, and the driver binds current platform/PCI IDs including Loongson and Synopsys/ST variants.

  2. synopsys.com

    Synopsys still markets USB 2.0 OTG/host/device controller IP, indicating the underlying IP family is not obsolete and continues to see new silicon design wins.

  3. lists.linaro.org

    Stable review carried a 2024 dwc2 gadget/LPM fix from Minas Harutyunyan, showing ongoing bug-fix traffic and maintainer attention rather than removal.

  4. kernel.googlesource.com

    Stable queue includes a recent dwc2 host hibernation fix with a lore link, further indicating active upstream maintenance in longterm kernels.

codex reasoning notes (technical)

In-tree inspection via shell showed this is an actual platform/PCI dual-role USB controller driver for the Synopsys DesignWare HS OTG core, not helper code. Web search on lore/stable surfaced recent 2024 dwc2 fixes and did not surface any removal/deprecation thread; cited stable-mirror and stable-queue URLs were obtained from web search results. LKDDb URL was obtained by web search and supports ongoing kernel enablement across current releases. Synopsys product page was obtained by web search and supports that DWC2-class IP remains in active commercial use. With 107 substantive commits in 5 years, 44 authors, and a most recent substantive touch on 2026-03-30, this is clearly maintained; there is no natural single upstream replacement because DWC2 covers a still-deployed USB2 DRD IP block across many SoCs.