drivers/reset

SoC reset controller framework and drivers

A generic kernel framework, plus around four dozen vendor-specific drivers, that lets system-on-chip platforms assert and release the reset lines feeding individual hardware blocks (USB controllers, Ethernet MACs, GPUs, and so on). It is used by virtually every modern ARM, RISC-V, and FPGA-SoC platform Linux runs on, from Renesas and Rockchip silicon to Microchip's PolarFire SoC.

keep conf=0.93 deploy=high replacement=none subsystem=reset category=infrastructure
93%

recommendation

It should stay because this is an actively maintained framework that lets dozens of modern SoCs (including Microchip's PolarFire SoC and many ARM, Renesas, and other vendors' parts still shipping in 2025) bring individual hardware blocks in and out of reset. The core code was still receiving functional changes and API additions in 2026, and roughly 47 vendor-specific reset drivers live alongside it.

repository signals

78 files
13,750 source lines
223 commits, 5y
+8,152 / −1,848 lines added / removed, 5y
95 authors, 5y
monthly commits · 2021-04-21 → 2026-04-21 · 223 total · active in 52/61 months
2021 2022 2023 2024 2025 2026 2021-04: 2 commits · +206 −11 2021-05: 5 commits · +6 −3 2021-06: 5 commits · +18 −129 2021-07: 1 commit · +183 −0 2021-08: 1 commit · +0 −1 2021-09: 6 commits · +218 −5 2021-10: 3 commits · +64 −9 2021-11: 1 commit · +1 −8 2021-12: 5 commits · +48 −47 2022-01: 3 commits · +156 −1 2022-02: 1 commit · +1 −0 2022-03: 1 commit · +14 −1 2022-04: 2 commits · +2 −2 2022-05: 1 commit · +135 −0 2022-06: 3 commits · +227 −25 2022-07: 7 commits · +193 −49 2022-08: 3 commits · +19 −6 2022-09: 2 commits · +166 −2 2022-10: 1 commit · +1 −1 2022-11: 1 commit · +1 −3 2022-12: 0 commits · +0 −0 2023-01: 0 commits · +0 −0 2023-02: 7 commits · +11 −34 2023-03: 6 commits · +3 −133 2023-04: 8 commits · +405 −267 2023-05: 2 commits · +4 −2 2023-06: 2 commits · +245 −2 2023-07: 11 commits · +57 −33 2023-08: 11 commits · +1 −19 2023-09: 2 commits · +3 −2 2023-10: 0 commits · +0 −0 2023-11: 2 commits · +12 −12 2023-12: 0 commits · +0 −0 2024-01: 3 commits · +344 −14 2024-02: 0 commits · +0 −0 2024-03: 5 commits · +9 −14 2024-04: 2 commits · +92 −9 2024-05: 0 commits · +0 −0 2024-06: 8 commits · +171 −27 2024-07: 2 commits · +615 −0 2024-08: 6 commits · +20 −46 2024-09: 16 commits · +617 −231 2024-10: 4 commits · +39 −3 2024-11: 2 commits · +19 −0 2024-12: 4 commits · +23 −96 2025-01: 0 commits · +0 −0 2025-02: 2 commits · +123 −5 2025-03: 6 commits · +217 −37 2025-04: 1 commit · +244 −0 2025-05: 0 commits · +0 −0 2025-06: 5 commits · +394 −57 2025-07: 4 commits · +587 −0 2025-08: 2 commits · +39 −4 2025-09: 2 commits · +441 −1 2025-10: 5 commits · +887 −133 2025-11: 12 commits · +290 −164 2025-12: 3 commits · +4 −7 2026-01: 6 commits · +500 −132 2026-02: 4 commits · +17 −14 2026-03: 3 commits · +37 −26 2026-04: 0 commits · +0 −0

sources

  1. lore.kernel.org

    Core reset framework code was still receiving functional changes in April 2026 ('reset: use a shared SRCU domain for reset controls').

  2. lore.kernel.org

    The subsystem was still seeing API expansion RFC work in April 2026 ('reset: Add reset_controller_get_provider()').

  3. docs.kernel.org

    The kernel documents reset controllers as a generic framework used by reset-controller providers and consumers across the kernel.

  4. microchip.com

    A current Linux-capable SoC family (PolarFire SoC / MPFS, which has a driver in this directory) is still marketed with current product and kit offerings.

codex reasoning notes (technical)

This is a real driver subsystem, not a helper library: local shell inspection showed 47 reset-controller driver .c files plus a maintained framework entry in MAINTAINERS. Both lore URLs came from `lore_file_timeline` on `drivers/reset/core.c`, which showed heavy 2024-2026 activity and recent functional work rather than retirement. The kernel docs URL was obtained by web search to confirm the directory is an active generic reset-controller framework, not legacy one-off code. The Microchip URL was obtained by web search as present-day deployment evidence for shipping hardware covered by this directory (e.g. MPFS/PolarFire SoC via `reset-mpfs.c`). Given active upstream development, many maintained vendor-specific drivers, and ongoing new SoC deployments, this should be kept.