linux-drivers/
drivers/gpu/drm/bridge/cadence

Cadence MIPI-DSI and MHDP8546 DisplayPort/HDMI bridge IP

Display output bridges built from Cadence's licensable MIPI-DSI and MHDP8546 DisplayPort/HDMI controller IP, embedded inside modern automotive and industrial SoCs such as TI's J721E/TDA4VM/DRA829 Jacinto 7 family and NXP's i.MX 8QuadMax. They drive the DSI panels, DisplayPort links, and HDMI outputs on those chips, including the TI J721E-specific glue wrapper.

keep conf=0.90 deploy=medium replacement=none subsystem=gpu category=graphics-display
90%

recommendation

It should stay in the kernel because the underlying display bridge blocks are licensed Cadence IP integrated into current SoCs from TI (J721E/TDA4VM/DRA829) and NXP (i.MX 8QuadMax), all of which were still being sold and supported with new SDK releases in 2025. The code is also actively maintained upstream, with patch series as recent as April 2026 refining the MHDP8546 mailbox handling rather than removing it.

repository signals

12 files
5,308 source lines
77 commits, 5y
+2,048 / −528 lines added / removed, 5y
30 authors, 5y
monthly commits · 2021-04-21 → 2026-04-21 · 77 total · active in 26/61 months
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sources

  1. lore.kernel.org

    As of 2026-04-24 the Cadence MHDP8546 bridge code is still receiving non-removal upstream work, including a v22 patch updating mailbox access functions.

  2. ti.com

    TI was still shipping J721E SDK releases in 2025-2026 for TDA4VM/DRA829 platforms, indicating ongoing supported deployments on SoCs that use these display blocks.

  3. software-dl.ti.com

    TI J721E Linux documentation lists DPI, DP, and DSI outputs, matching the Cadence bridge/wrapper use case in this directory.

  4. nxp.com

    NXP's 2024 i.MX 8QuadMax datasheet advertises 2x MIPI-DSI and 1x HDMI-TX/DisplayPort, showing comparable Cadence-style embedded display bridge functionality remains present in still-documented SoCs.

codex reasoning notes (technical)

Local shell inspection of Kconfig/Makefile/source filenames identified this as active Cadence embedded SoC display bridge code (`cdns-dsi*`, `cdns-mhdp8546*`, TI J721E wrappers), not a legacy standalone board driver. `lore_file_timeline` on `cdns-mhdp8546-core.c` showed heavy 2025-2026 activity and current patch series rather than removal. Web search produced the TI SDK page, TI J721E DSS docs, and NXP i.MX8QM datasheet, which indicate the underlying DP/DSI-capable SoCs remained current in 2025+. A `lei` removal/deprecation query was attempted but failed in this sandbox, so absence of removal talk is inferred from the active lore traffic rather than proven by a negative search.