Internal helper code inside AMD's Display Core stack that handles power-gating sequences for the DCN 3.5 display engine, which is the display block found in recent AMD APUs such as the Ryzen mobile parts using RDNA 3.5 graphics. It is a sub-component of the larger amdgpu display driver, not a standalone driver in its own right.
This is not actually a driver directory; it is a small chunk of ASIC-specific helper code that lives inside AMD's Display Core (DC) framework under amdgpu. It is built as part of the main AMD GPU driver and only handles power-gating logic for the DCN 3.5 display hardware, so it should not be evaluated for keep/remove on its own.
repository signals
2files
768source lines
4commits, 5y
+798 / −30lines added / removed, 5y
4authors, 5y
monthly commits · 2021-04-21 → 2026-04-21 · 4 total · active in 3/61 months
sources
No sources cited.
codex reasoning notes (technical)
Not a driver directory: ASIC-specific AMD display core power-gating helper code under DRM/DC, not a standalone kernel-bound hardware driver.