Internal building blocks for the Output Timing Controller block of AMD's DCN 2.01 display hardware, which is the display pipeline used in low-power Ryzen APUs such as the custom chips found in the Steam Deck and similar embedded designs. It is part of the larger amdgpu graphics stack rather than a piece of hardware on its own.
This is not actually a driver directory; it is a sub-component of the amdgpu Display Core (DC) implementation, providing chip-specific helper code for one revision of AMD's display pipeline. It only makes sense as part of the wider AMD GPU driver and is not loaded or maintained independently.
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monthly commits · 2021-04-21 → 2026-04-21 · 4 total · active in 4/61 months
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codex reasoning notes (technical)
Not a driver directory: internal AMD DCN2.01 display pipeline helper/block implementation within amdgpu DRM, not a standalone kernel-bound hardware driver.