Internal helper code for the Output Timing Controller block inside AMD's Display Core Next 2.0 hardware, used by the amdgpu display pipeline on Navi-generation Radeon GPUs (Radeon RX 5000 series, circa 2019). It generates display timings, manages CRTCs, and feeds pixels to the connected monitors.
This is not a standalone driver but a sub-component of the larger AMD amdgpu/Display Core stack. It is a set of timing-controller helpers specific to the DCN 2.0 generation and only has meaning as part of the broader Radeon graphics driver, so it cannot be evaluated for keep/remove on its own.
repository signals
2files
708source lines
8commits, 5y
+734 / −26lines added / removed, 5y
7authors, 5y
monthly commits · 2021-04-21 → 2026-04-21 · 8 total · active in 7/61 months
sources
No sources cited.
codex reasoning notes (technical)
Not a driver directory: internal AMD DCN2.0 display pipeline helper code under amdgpu/display, not a standalone kernel-bound hardware driver.