Internal building-block code inside the AMD Display Core stack for DCN 3.5, the display pipeline used in recent AMD APUs such as the Ryzen 7040/8040 series. It implements the Output Pixel Processor stage that handles formatting, scaling-related conversions, and gamma at the tail end of the display pipeline.
This is not actually a standalone driver directory; it is a sub-component of the larger amdgpu Display Core driver. It only makes sense as part of the surrounding AMD GPU display stack and would not be evaluated for keep/remove on its own.
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monthly commits · 2021-04-21 → 2026-04-21 · 2 total · active in 2/61 months
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codex reasoning notes (technical)
Not a driver directory: internal AMD DCN 3.5 display-pipeline OPP helper code within amdgpu/DC, not a standalone kernel-bound hardware driver.