drivers/gpu/drm/amd/display/dc/opp/dcn10

AMD DCN1.0 Output Pixel Processor helper code

Internal building blocks of AMD's Display Core (DC) for the first-generation DCN display pipeline, specifically the Output Pixel Processor stage that handles final pixel formatting before signals leave the GPU. DCN1.0 hardware first shipped in Raven Ridge APUs around 2017.

not-a-driver conf=1.00 deploy=none replacement=none subsystem=gpu category=not-a-driver

100%

recommendation

This is not actually a standalone driver; it is a subcomponent inside the amdgpu display stack that other parts of the AMD DRM driver call into. It only makes sense as part of the larger amdgpu/DC driver and cannot be evaluated for keep-or-remove on its own.

repository signals

2 files

618 source lines

2 commits, 5y

+621 / −3 lines added / removed, 5y

2 authors, 5y

monthly commits · 2021-04-21 → 2026-04-21 · 2 total · active in 2/61 months

sources

No sources cited.

codex reasoning notes (technical)

Not a driver directory: DCN10 OPP code is an internal AMD display-core helper subcomponent, not a standalone kernel-bound hardware driver.