Internal hardware-sequencing code for AMD's Display Core Next 3.1 block, the display controller built into Ryzen APUs starting around 2022 (Rembrandt and related parts). It is one piece of the larger amdgpu graphics driver rather than a standalone module.
This is not actually a driver directory; it is a subfolder of internal helper code inside AMD's amdgpu display stack that handles hardware programming sequences for the DCN 3.1 display engine (used in Ryzen 6000-series APUs and similar). It only exists as part of the larger amdgpu driver and is not independently loadable or removable.
repository signals
4files
983source lines
40commits, 5y
+1,035 / −52lines added / removed, 5y
30authors, 5y
monthly commits · 2021-04-21 → 2026-04-21 · 40 total · active in 21/61 months
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codex reasoning notes (technical)
Not a driver directory: internal AMD DCN3.1 display hardware-sequencing helper code within amdgpu/display, not a standalone kernel-bound hardware driver.