drivers/gpu/drm/amd/display/dc/dwb/dcn35

AMD DCN 3.5 Display Writeback (DWB) block

Internal helper code inside AMD's Display Core (DC) that handles the Display Writeback hardware block on DCN 3.5 generation GPUs, found in recent Ryzen APUs. Writeback lets the display pipeline capture rendered frames back to memory, used for features like miracast and frame capture.

not-a-driver conf=1.00 deploy=none replacement=none subsystem=gpu category=not-a-driver

100%

recommendation

This is not actually a standalone driver directory; it is a small piece of the AMD Display Core inside the amdgpu graphics driver, providing per-IP-block code for the DCN 3.5 writeback unit. It only makes sense as part of the larger amdgpu/DC stack and is not independently loadable or removable.

repository signals

2 files

118 source lines

2 commits, 5y

+119 / −1 lines added / removed, 5y

2 authors, 5y

monthly commits · 2021-04-21 → 2026-04-21 · 2 total · active in 2/61 months

sources

No sources cited.

codex reasoning notes (technical)

Not a driver directory: DCN3.5 DWB block implementation under AMD DC display pipeline, i.e. internal display helper/IP block code rather than a standalone kernel-bound hardware driver.