Internal helper code inside AMD's Display Core that programs the display clock generator (DCCG) block on DCN 3.01 generation GPUs, the display pipeline used in AMD's Van Gogh APU family from around 2021. It is one piece of the larger amdgpu graphics driver rather than a self-contained driver.
This is not actually a driver directory; it is an internal subcomponent of AMD's Display Core (DC) code that implements the clock generator block for the DCN 3.01 generation of display hardware (used in chips like the Van Gogh APU powering the Steam Deck). It ships as part of the larger amdgpu driver rather than as a standalone module.
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5commits, 5y
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5authors, 5y
monthly commits · 2021-04-21 → 2026-04-21 · 5 total · active in 2/61 months
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codex reasoning notes (technical)
Not a driver directory: DCN301 display clock-generator implementation subdirectory inside AMD display core, i.e. internal helper code rather than a standalone kernel-bound hardware driver.