A subcomponent of AMD's Display Core Next (DCN) 3.1.6 hardware block, used inside the amdgpu graphics driver to manage display engine clock frequencies on certain Ryzen APUs. It is not a standalone driver but a piece of the larger AMD display code that sets pixel and memory clocks for the display pipeline.
This is not actually a standalone driver directory; it is an internal helper module within AMD's amdgpu display stack that handles clock management for the DCN 3.1.6 display IP. Its lifecycle is tied to the broader amdgpu driver and it should be evaluated as part of that subsystem rather than on its own.
repository signals
4files
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30commits, 5y
+1,363 / −151lines added / removed, 5y
20authors, 5y
monthly commits · 2021-04-21 → 2026-04-21 · 30 total · active in 19/61 months
sources
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codex reasoning notes (technical)
Not a driver directory: AMD DCN3.16 display clock-manager subcomponent under amdgpu/display, not a standalone kernel-bound hardware driver.