drivers/dpll

DPLL subsystem and Microchip Azurite ZL3073x network timing chips

A kernel framework for digital phase-locked-loop hardware used in precision network timing, plus a driver for Microchip's Azurite ZL3073x PTP and SyncE network synchronizer chips. These parts give telecom and data-center switches up to five timing channels with many inputs and outputs, keeping clocks across a network aligned to sub-microsecond accuracy.

keep conf=0.94 deploy=medium replacement=none subsystem=dpll category=infrastructure
94%

recommendation

It should stay in the kernel because both the generic DPLL core and the ZL3073x driver are seeing active development, with substantive feature work and bug fixes landing in 2025 and into 2026. Microchip is still marketing the ZL3073x synchronizers for new telecom and data-center designs, and the subsystem is documented kernel infrastructure that other timing drivers depend on, so there is no sign of deprecation.

repository signals

31 files
10,299 source lines
98 commits, 5y
+12,007 / −1,619 lines added / removed, 5y
21 authors, 5y
monthly commits · 2021-04-21 → 2026-04-21 · 98 total · active in 21/61 months
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sources

  1. patch.msgid.link

    The in-tree ZL3073x part of drivers/dpll was still receiving substantive bug fixes in February 2026, indicating active upstream maintenance rather than retirement.

  2. patch.msgid.link

    The generic DPLL core itself gained new functionality in February 2026 (reference-count tracking support), showing the subsystem is actively evolving.

  3. patch.msgid.link

    drivers/dpll added basic support for the Microchip ZL3073x family in 2025, confirming the directory backs real contemporary hardware rather than only legacy devices.

  4. ww1.microchip.com

    Microchip published a current product brief for ZL30731-ZL30735 in 2025, supporting that this hardware family was still marketed for new designs in 2025.

  5. kernel.org

    Kernel documentation describes DPLL as an active generic subsystem used by device drivers to expose DPLL hardware via netlink, reinforcing that drivers/dpll is infrastructure with ongoing users rather than a dead standalone driver.

codex reasoning notes (technical)

Local inspection via shell showed drivers/dpll contains the generic DPLL core and netlink pieces, with actual hardware support in drivers/dpll/zl3073x. `git log` on the directory showed substantial 2025-2026 development and fixes; `git log --grep='remove|deprecat' -- drivers/dpll` did not show an upstream removal/deprecation series, only ordinary code cleanups. URLs above were obtained from commit messages via shell `git log` (patch.msgid links) and from web search (kernel.org docs, Microchip product brief). Given active maintainer traffic, recent feature work, and still-marketed ZL3073x timing hardware, this should be kept.